Connecting stacks of chips

Demands for enhanced functionality in smaller packages at lower prices have driven miniaturisation in the microelectronics sector. Further miniaturisation will require a step-change in design, but placing individual semiconductor dies on top of each other requires reliable joining technology to electrically connect them. Integration requires lowering thermal resistance to enable higher interconnect density and device reliability during thermomechanical loading.

The lack of such technology and its creation of a roadblock to further miniaturisation spurred scientists to launch the EU-funded HYPERCONNECT project. HYPERCONNECT is developing a pioneering sequential joint-forming process. The composite joints made from nanoparticles (NPs), polymers and filler will be sequentially formed by first applying an NP suspension and then evaporating the solvent. The NPs will then self-assemble by capillary bridging, forming 'necks' between micrometre-sized structures.

After screening tests, scientists selected the aluminium oxide (alumina) filler NPs for the dielectric necks. They were passed through a sieve for more uniform size and shape distribution and delivered to all partners. The team also developed a new epoxy formulation for backfilling with customised properties not available in commercial products.

Processing work is focused on the best way to deposit NP-based materials for subsequent neck formation. Tasks include experiments related to processing of filler particles, positioning and immobilisation of materials, and studies of the mechanisms of neck formation.

Materials and technology development is being supported by a rigorous experimental characterisation campaign and modelling. Using knowledge of a product's lifetime loading and failure mechanisms from experimental testing is facilitating reliability design and assessment. Simulations to date have addressed both emerging needs of the development work and groundwork for lifetime modelling based on physics-of-failure. Life-cycle assessments are pointing the way to economically and environmentally sound materials selections.

HYPERCONNECT expects to deliver superior multi-materials joining technology with a 10-fold increase in thermal conductivity and 5-fold increase in reliability. It will enable novel 3D stacked chip architectures, paving the way to continued miniaturisation and putting the EU in the lead of an economically important race.